Certain known circuits for selectively switching analog signals to the inputs of a multiple-input signal processing stage, such as a differential amplifier or comparator, commonly rely upon switches in each signal input that include, for example, CMOS-type transistors that can be selectively triggered on or off to selectively pass or block the applied analog signals. However, circuits of this type commonly include significant resistance in the conduction mode of such transistor switches which, coupled with input capacitance of the following signal stage, significantly affects high-frequency signal transmission through the low-pass filter thus formed.
Alternatively, analog input signals may be selectively applied to the inputs of a multi-input signal processing stage via separate buffer amplifiers which can be selectively biased to enable and disable application of input signals to the inputs of the signal processing stage. However, such buffer amplifiers commonly introduce undesirable circuit complexity and offset voltages.
Still other known schemes for controlling the application of multiple analog signals to the inputs of an analog differential amplifier include cascaded pairs of differentially-connected transistors which are switched by transistors in the collector (or drain) circuits of each differential input pair of transistors. However, such circuits typically limit the range of signal levels over which high common-mode rejection can be achieved.